alt Hacker NewsWhy is that surprising? The trap into kernel mode alone would already take more cycles than dedicated hardware needs for the full page table walk.
Why is that surprising? The trap into kernel mode alone would already take more cycles than dedicated hardware needs for the full page table walk.
Since we're talking about defining our own processor, that means we need to define one with cheaper traps.
Expanding on what I wrote above about "bits of hardware acceleration", maybe adding a few primitives to the instruction set that make page table walking easier would help.
And with a trusted compiler architecture you don't need to keep the ISA stable between iterations, since it's assumed that all code gets compiled at the last minute for the current ISA.
Lots of fun things to experiment with.