I believe the actual silicon of a 6502 is much smaller than the DIP package, so even if we couldn't shrink the silicon itself much more, you could just take up more space inside the package, and use a package that has more pins in it, like current CPU designs. You would probably hit a bottleneck at some point since I believe the speed of light is a problem for processing speed at some point, but then I'd expect we'd just go into massively parallel systems, with multiple cores acting somewhat individually