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reitzensteinmyesterday at 5:45 PM1 replyview on HN

At the intersection of these two topics, does Antithesis have any capabilities around simulating memory ordering to validate lock free algorithms?


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carlsverreyesterday at 8:40 PM

We support thread-pausing via instrumentation. This can cause threads to observe different interleavings, which can help uncover bugs in concurrent algorithms. At this time, we don't perform specific memory model fault injection or fuzzing.