Does the language in this not make sense to anyone? Is it trying to say the the L2 cache provided by the chipset is not able to access memory past a specific address?
On the 486 the L2 tag memory is a separate external chip, as are the L2 chips. Why waste space on physical address bits that will never be used? DOS is never using that much memory. So only low addresses are cached.
On the 486 the L2 tag memory is a separate external chip, as are the L2 chips. Why waste space on physical address bits that will never be used? DOS is never using that much memory. So only low addresses are cached.