I worked at the architecture level on designs to mitigate signal corruption inside the asic. I don't remember the exact numbers, and obviously it depends on the design. but you need to add error detection and correction on every path (busses, mixes, registers, function units, etc). the number I seem to recall was a 25% area overhead and a nominal decrease in clock rate. this was for an earth-bound very large machine, so idk if that would be sufficient for space. usually those designs have much larger nodes and much slower clock rates. primarily because of damage caused by ionizing radiation that accumulates over time.

so sure, the heat issue seems fatal, but rad-hard designs will certainly have a bottom line impact