Source paper linked is https://aisystemcodesign.github.io/papers/isca26/vistara_cam...
From a quick skim, you could think of this as roughly equivalent to shoving a large amount of DDR4 on a PCIe card and using it as a swap space. It's more sophisticated (see CXL protocol), but that gives you an idea of the tradeoffs. It seems there is some OS-level support for moving hot/cold pages between the main fast DRAM and the expansion higher latency DRAM.
It's a very valid point that DRAM has a fairly long lifetime and contains significant embedded carbon emissions, as well as the current availability crisis of new DRAM.
I’ve wanted this for a long time and it seems to reemerge during RAM boom cycles and then disappear during busts.
I have 32GB of DDR3 that would be great for scratch space or cache of i could throw it on a card.
> and contains significant embedded carbon emissions
Hi - thanks for the insightful comment - could you please expand on the above?
Genuinely curious :)