Why is that true? Can’t you just make more stuff parallel and shrink the ASIC chips accordingly?
No - inability to do so is part of the design of a good cryptographic hash, quite explicitly.
https://en.wikipedia.org/wiki/Avalanche_effect
No - inability to do so is part of the design of a good cryptographic hash, quite explicitly.
https://en.wikipedia.org/wiki/Avalanche_effect