One thought I had is that you could use FPGAs to get hardware performance but maintain the ability to dynamically update. I don't know enough about hardware to consider trying such a thing but I'm curious if that could be made practical and economical somehow.
Probably not for 2-3 decades unfortunately. The largest FPGAs in the world come out around ~10 million cells (the programmable component of an FPGA). GPT-2 is 1600 million parameters, Qwen 3.5's smallest model is 800 Million parameters.