Mythic's analog compute-in-memory architecture

My understanding (perhaps outdated) is that manufacturing variability is a key challenge for analog computing. Digital designs are also fundamentally analogue under the hood, but if you only need to resolve a 0 or 1 you are much more tolerant of any source of noise. I wouldn't mind hearing even a little bit more from Mythic about how they make this work in practice.

A 2026 EE Times article [1] refers to "compensation" and "calibration" techniques.

[1] https://www.eetimes.com/mythic-rises-from-the-ashes-with-125...

If you’re looking for their LLM page it’s https://www.mythic.ai/enterprise-llm

I wish they would have done what Taalas did with chatjimmy.ai and just directly host a model for us to view, rather than just claiming it’s 50x faster than Nvidia/groq. Their claim is specifically for a 1 trillion param model. So they could have just grabbed GLM 5.2, or similar, and hosted it.

> Mythic M1 stores up to 80 million neural network weight parameters directly on-chip

Which means connecting over 30 chiplets to run a Qwen 3.8 27b and over 3000 chiplets to run Qwen3.8-2.4T-A95B. Cost? Space? Feasibility?

Edit: seemingly, the M1 is only part of the whole need. With the M1, you would run a feedforward pass of the NN but use the rest of the Von Neumann architecture to manage the data. The pass in the M1 will be lightning fast, the rest still a bottleneck. The M1 is almost explicitly not for LLMs.

Their numbers look too good to be true, they have no identified customers and the whole site is generated, but I think the principle behind it is good. If they can pull off the error correction needed to make analog reliable we might have a great new option for cheaper more eco friendly AI. Then again it could turn out to be a total scam.

This looks cool a chiplet can fit 30m params so the biggest card can fit qwen 3.8 27b it would be cool to see some benchmarks on things like that publically.