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apiyesterday at 11:46 PM1 replyview on HN

Integrated RAM with tensor processing seems like the end game for silicon that's actually efficient at running AI models.

Or integrated flash with TPUs? That would be awesome. Flash your model onto a model-processor and run it.


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wtallistoday at 12:21 AM

I wonder if we might eventually see stacking of NAND, logic, and DRAM dies together so each can still be fabbed on their specialized process. Getting all three on one wafer is extremely impractical, but having them all connected with TSVs or other bonding might be feasible, if the density of the respective dies works out right to give you the right ratio of storage for weights, working memory, and compute.

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