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nomeltoday at 1:34 AM1 replyview on HN

What's the technical reason for them being slow? Book keeping with caches or something?


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monocasatoday at 1:48 AM

Mostly tons of speculative state that needs to be unwound, combined with spectre mitigations, plus tons of committed state that the interrupt prologue needs to save, plus a huge song and dance to do that correctly (that FRED should help with).

All combined with the fact that there's a good chance the memory the interrupt handler is going to touch isn't in the cached working set anymore, both in the actual L* caches and in subtler places like the branch predictors and TLBs.

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