Yes, the density vs power tradeoff could make a lot of sense in a few applications.
I wonder if it would start to make sense for SRAM caches to shrink (or not grow as fast) in favor of adding on chip DRAM cache at some tier.
They claim win + win*10:
> provides up-to 50% area reduction and reduced power consumption by a factor ten
I wonder if it would start to make sense for SRAM caches to shrink (or not grow as fast) in favor of adding on chip DRAM cache at some tier.