What I find most interesting about the computer side of traffic signal controllers is the interlock design needed to prevent a glitch or memory fault from activating conflicting phases at once, eg two intersecting approaches getting green simultaneously. That's about as safety-critical as it gets for a piece of everyday infrastructure. Would've liked to see more depth on that, though I imagine the specifics are controller/vendor-specific.

I think that interlock design also goes some way toward mitigating the security risks ASCT systems would otherwise pose, as mentioned in the article. On any decent controller, even the control room shouldn't be able to deliberately trigger conflicting phases.