Sorry to be pedantic but...every "boolean" logic gate can be made out of NAND gates pretty trivially (XOR too for that matter). So you just have to design a computer from logic gates and then decompose each one into NANDs.
"I made a computer out of n logic gates" doesn't sound as cool I guess?
Granted I am criticizing the concept and post title, not the execution.
I thought this was generally known?
I don’t have any familiarity with what’s considered the state of the art here, but I was wondering if the number of nand gates used is significant? So maybe this is neat because it uses less than was though possible?
Edit: looks like from reading some additional comments here that this isn’t particularly novel in that regard though…