alt Hacker NewsFrom an investment perspective, I think chip fabs TSMC, Intel, and Samsung will benefit from better AI chip design tools.
If AI made it 100x faster and cheaper to build software, you suddenly have an explosion of software that need to be hosted. So companies like AWS/iOS App Store/cloud companies benefit.
If AI makes designing chips 100x faster and cheaper, you will have an explosion of custom chips for all sorts of applications. These chips still need to be physically made at TSMC, Intel, or Samsung.
Apple says it takes 3-4 years to design each Apple Silicon generation.[0] So the M6 was being designed in 2022-2023 already. Reports are that it costs hundreds of millions to a billion to design a cutting edge chip from scratch to finish.[0]
The cool thing is that we'll have niche ASIC chips for accelerating special applications that previously didn't have big of a market for someone to make a profit on. This is the same thing with software today. It's much easier to build custom software for a small niche and be profitable today than in 2022.
Maybe some day, a kid in his garage can just tell an AI to design a custom chip, send it to TSMC, and get the chip in the mail in a few weeks.
And given that Moore's Law is essentially dead in terms of density scaling, having an AI to automatically optimize the hell out of design and squeeze as much performance as possible out of the transistors could help us have a few more years of nice performance increase.
[0]https://fireflies.ai/blog/johny-srouji-and-john-ternus-inter...
[1]https://www.granitefirm.com/blog/us/2023/04/29/cost-of-chip-...
Replies
> These chips still need to be physically made at TSMC, Intel, or Samsung.
That's for the most advance tech (sub 10nm and such). There is a lot of fab for chips that do not require the latest and greatest. If LLMs make it easier / more accessible to design ASIC, I think those fabs will be the one who will benefit the most.
This might make some sense if, the cost of any change in design vs requirement wouldn't cost $30-50M in mask and tape-out alone. That doesn't count the first wafer 'hot lots' just to get the design's first wafer out in only 3 months, or the bringup and modified test equipment to validate the design, or the corners testing and optimization, or the package tooling, or... Those can easily be additional $10Ms and that's per design, if you do a full mask change. If you can "fix it in metal", you might get that down to just $10M and 1 month?
This isn't software. The time, labor, and equipment costs of the first wafer dwarf the redesign cost, so it makes sense to get it right the first time. What if every build, compile, and link cost you $10M and 1 month? How would that change your work flow?
Most of the "AI" design tools today are focused on verification, validation and layout, which makes a lot of sense. They might help with architecture in the future (or making something high yield AND easy to fix in metal)?
You could run a small design on an MPW shuttle to reduce these costs, but your TTM get's longer, the yields won't be as high, and if you go to mass production you still face the huge mask costs.
Another place this might make some sense is reworking old large die 130nm designs on 8" wafers to be newer 28mm designs on 12", there are a LOT of those. The mask costs are lower, the design is well understood with lots of process margin, and wafer/yield costs could be modeled and favorable. Of course analog scaling is a whole separate kettle of fish.