alt Hacker NewsThe EDA tools that are used to design chips do not support diagonal wires so that kind of rules out hexagonal grids. With only horizontal and vertical wires you end up with rectangular/square grids or rings.
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xpct • today at 6:07 AM
If that is so, would it be entirely to decrease search space for layout algorithms? I believe there isn't anything in the fabrication process that couldn't model diagonals.
I could see that square packing is more simple, but by shifting elements per row I don't see why it couldn't propagate at odd angles.
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Do you need diagonal wires for a topological hexagonal tiling?
Wouldn't a rectangular brick layout be topologically a hexagonal tiling