Interesting... Upon reflection, I feel like it's a "yes, and" proposition coming down to failure mode.

[Type A] Constant use a constant power level: Quantum world rules would dominate.

When run hot, electron tunneling will kill off individual transistors, and AFAIK that is a cascading failure mode once it takes root. A big enough failed spot, even if localised, could effectively kill a core (if not the whole chip---too many errors). A local hotspot will directly affect neighbours, and indirectly the chip as a whole because the same work is being pushed on fewer cores.

[Type B] Thermal cycled: Mechanical and electrical factors would dominate...

Microfractures / mechanical damage in weak areas of whole chips, and motherboards. In a hyperscaler server rack, if a board dies that part of the rack is dead---micro-maintenance is probably too expensive.

And speculating further, it stands to reason that Type B failures would likely cause Type A failures, and vice-versa.